This invention relates to a semiconductor capacitor device formed on a semiconductor substrate, in particular to a semiconductor capacitor device that suppresses a change in its capacitance value due to applied voltage.
In a semiconductor capacitor device used for a semiconductor integrated circuit, in particular, for an analog circuit, the capacitance accuracy greatly influences the accuracy of the whole circuit, and thus it is important to suppress a change in capacitance value due to applied voltage.
On the other hand, with miniaturization of semiconductor integrated circuits, an area of a transistor is required to be reduced. Thus, it is also necessary to reduce a capacitor area. For this reason, thinning a capacitor dielectric film has been carried out, but the coefficient of voltage dependence of a capacitance becomes greater in inverse proportion to the square of the film thickness. Therefore, even if the capacitor dielectric film is made thin, there is still an important task to keep the voltage dependence of the capacitance low.
Incidentally, a capacitor having a structure in which an insulating film is sandwiched between a diffusion layer and polysilicon forms a PN-junction capacitance between the diffusion layer and a substrate. The PN-junction capacitance is highly dependent upon voltage and therefore it becomes difficult to obtain a capacitor of which the capacitance value does not depend on applied voltage.
Further, there is a capacitor having a structure in which a dielectric film is sandwiched between upper and lower polysilicon layers, an example of which is disclosed in JP-A-9-36313. In this type of capacitor element, it is required to dope an electrode made of the polysilicon layer at a high concentration in order to reduce the resistance of the electrode and the voltage dependence of the capacitance value.
However, no matter how high the doping concentration is made, a depletion layer is generated in the polysilicon electrode itself. The width of the depletion layer changes due to the voltage across the electrodes, resulting in a change in the capacitance value. Therefore, a capacitor having the above structure is not suitable for a highly accurate analog circuit.
On the other hand, Japanese Patent Publication JP-A-5-129522 discloses an example of a capacitor having a structure in which a dielectric film is sandwiched between upper and lower metal layers, i.e., an MIM (metal-insulator-metal) capacitor. As shown in FIG. 4, an upper electrode 121 and a lower electrode 118 of the capacitor are made of aluminum and a high melting-point metal, respectively. In the figure, the reference numeral 120 indicates a conductive protective layer, the reference numeral 119 an insulating layer for capacitor, the reference numeral 117 an interlayer insulating layer, and the reference numeral 101 a silicon substrate. Since this type of capacitor element does not cause depletion in the metal electrodes 121, 118, a capacitor of which the capacitance does hardly depend on applied voltage can be obtained. Accordingly, it is particularly useful as an analog capacitor.
Further, it is disclosed in Japanese Patent publication JP-A-7-221599 that as shown in FIG. 5, two MOS (metal-oxide-semiconductor) capacitors 222 and 223 are connected in inverse parallel so that the voltage dependences of the capacitances of the MOS capacitors 222 and 223 counteract each other. In a case where a gate electrode 224 of this MOS capacitor is a metal, a capacitor whose capacitance does not depend on applied voltage and whose performance is equal to that of the MIM capacitor can be obtained.
FIG. 6 shows the voltage dependence of the capacitance of an MIM capacitor using a silicon nitride film as a capacitor dielectric film. As is apparent from FIG. 6, the MIM capacitor also has voltage dependence of the capacitance value, although a little. For this reason, in order to realize an analog-use capacitor having higher performance, even the MIM capacitor requires further suppression of the voltage dependence of its capacitance.